1 /* 2 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. 3 * 4 * HDF is dual licensed: you can use it either under the terms of 5 * the GPL, or the BSD license, at your option. 6 * See the LICENSE file in the root of this repository for complete details. 7 */ 8 9 #ifndef MMC_CAPS_H 10 #define MMC_CAPS_H 11 12 #include "hdf_base.h" 13 14 #ifdef __cplusplus 15 #if __cplusplus 16 extern "C" { 17 #endif 18 #endif /* __cplusplus */ 19 20 enum MmcVolt { VOLT_3V3 = 0, VOLT_1V8, VOLT_1V2 }; 21 22 enum MmcPowerMode { MMC_POWER_MODE_POWER_OFF = 0, MMC_POWER_MODE_POWER_UP, MMC_POWER_MODE_POWER_ON }; 23 24 enum MmcBusWidth { BUS_WIDTH1 = 0, BUS_WIDTH4 = 2, BUS_WIDTH8 = 3 }; 25 26 enum MmcBusTiming { 27 BUS_TIMING_MMC_DS = 0, 28 BUS_TIMING_MMC_HS, 29 BUS_TIMING_SD_HS, 30 BUS_TIMING_UHS_SDR12, 31 BUS_TIMING_UHS_SDR25, 32 BUS_TIMING_UHS_SDR50, 33 BUS_TIMING_UHS_SDR104, 34 BUS_TIMING_UHS_DDR50, 35 BUS_TIMING_UHS_DDR52, 36 BUS_TIMING_MMC_HS200, /* for emmc */ 37 BUS_TIMING_MMC_HS400, /* for emmc */ 38 }; 39 40 union MmcCaps { 41 uint32_t capsData; 42 struct CapsBitsData { 43 uint32_t cap4Bit : 1; /* bit:0 support 4 bit transfer */ 44 uint32_t cap8Bit : 1; /* bit:1 support 8 bit transfer */ 45 uint32_t highSpeed : 1; /* bit:2 support high-speed timing */ 46 uint32_t sdioIrq : 1; /* bit:3 signal pending SDIO irqs */ 47 uint32_t onlySpi : 1; /* bit:4 only support spi protocols */ 48 uint32_t needPoll : 1; /* bit:5 need polling for card-detection */ 49 uint32_t nonremovable : 1; /* bit:6 Nonremovable eg. eMMC */ 50 uint32_t waitWhileBusy : 1; /* bit:7 waits while card is busy */ 51 uint32_t erase : 1; /* bit:8 allow erase */ 52 uint32_t ddr1v8 : 1; /* bit:9 support ddr mode at 1.8V */ 53 uint32_t ddr1v2 : 1; /* bit:10 support ddr mode at 1.2V */ 54 uint32_t powerOffCard : 1; /* bit:11 support power off after boot */ 55 uint32_t busWidthTest : 1; /* bit:12 CMD14/CMD19 bus width ok */ 56 uint32_t uhsSdr12 : 1; /* bit:13 support UHS SDR12 mode */ 57 uint32_t uhsSdr25 : 1; /* bit:14 support UHS SDR25 mode */ 58 uint32_t uhsSdr50 : 1; /* bit:15 support UHS SDR50 mode */ 59 uint32_t uhsSdr104 : 1; /* bit:16 support UHS SDR104 mode */ 60 uint32_t uhsDdr50 : 1; /* bit:17 support UHS DDR50 mode */ 61 uint32_t xpc330 : 1; /* bit:18 support >150mA current at 3.3V */ 62 uint32_t xpc300 : 1; /* bit:19 support >150mA current at 3.0V */ 63 uint32_t xpc180 : 1; /* bit:20 support >150mA current at 1.8V */ 64 uint32_t driverTypeA : 1; /* bit:21 support driver type A */ 65 uint32_t driverTypeC : 1; /* bit:22 support driver type C */ 66 uint32_t driverTypeD : 1; /* bit:23 support driver type D */ 67 uint32_t maxCurrentLimit200 : 1; /* bit:24 max current limit 200mA */ 68 uint32_t maxCurrentLimit400 : 1; /* bit:25 max current limit 400mA */ 69 uint32_t maxCurrentLimit600 : 1; /* bit:26 max current limit 600mA */ 70 uint32_t maxCurrentLimit800 : 1; /* bit:27 max current limit 800mA */ 71 uint32_t cmd23 : 1; /* bit:28 support CMD23 */ 72 uint32_t hardwareReset : 1; /* bit:29 support hardware reset */ 73 uint32_t sdSupportProtocol3 : 1; /* bit:30 SD support Protocol 3.0 */ 74 uint32_t cmdStop : 1; /* bit:31 support cmd stop */ 75 } bits; 76 }; 77 78 union MmcCaps2 { 79 uint32_t caps2Data; 80 struct Caps2BitsData { 81 uint32_t bootPartNoAcc : 1; /* bit:0 boot partition no access */ 82 uint32_t cacheCtrl : 1; /* bit:1 allow cache control */ 83 uint32_t poweroffNotify : 1; /* bit:2 support notify power off */ 84 uint32_t noMultiRead : 1; /* bit:3 not support multiblock read */ 85 uint32_t noSleepCmd : 1; /* bit:4 not support sleep command */ 86 uint32_t hs200Sdr1v8 : 1; /* bit:5 support hs200 sdr 1.8V */ 87 uint32_t hs200Sdr1v2 : 1; /* bit:6 support sdr hs200 1.2V */ 88 uint32_t brokenVoltage : 1; /* bit:7 use broken voltage */ 89 uint32_t detectNoErr : 1; /* bit:8 I/O err check card removal */ 90 uint32_t hcEraseSize : 1; /* bit:9 High-capacity erase size */ 91 uint32_t hs400Support1v8 : 1; /* bit:10 support hs400 1.8V */ 92 uint32_t hs400Support1v2 : 1; /* bit:11 support hs400 1.2V */ 93 uint32_t hs400EnhancedStrobe : 1; /* bit:12 support hs400 enhanced strobe */ 94 uint32_t reserved : 18; /* bits:13~31, reserved */ 95 } bits; 96 }; 97 98 #ifdef __cplusplus 99 #if __cplusplus 100 } 101 #endif 102 #endif /* __cplusplus */ 103 104 #endif /* _MMC_CAPS_H */ 105