1 /*
2  * Copyright (c) 2024 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H
17 #define API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H
18 
19 #include <cstdint>
20 
21 #include <base/containers/array_view.h>
22 #include <base/containers/vector.h>
23 #include <render/device/pipeline_state_desc.h>
24 #include <render/namespace.h>
25 
26 RENDER_BEGIN_NAMESPACE()
27 /** \addtogroup group_render_pipelinelayoutdesc
28  *  @{
29  */
30 /** Pipeline layout constants */
31 struct PipelineLayoutConstants {
32     /** Max descriptor set count */
33     static constexpr uint32_t MAX_DESCRIPTOR_SET_COUNT { 4u };
34     /** Max dynamic descriptor offset count */
35     static constexpr uint32_t MAX_DYNAMIC_DESCRIPTOR_OFFSET_COUNT { 16u };
36     /** Invalid index */
37     static constexpr uint32_t INVALID_INDEX { ~0u };
38     /** Max push constant byte size */
39     static constexpr uint32_t MAX_PUSH_CONSTANT_BYTE_SIZE { 128u };
40     /** Max binding count in a set */
41     static constexpr uint32_t MAX_DESCRIPTOR_SET_BINDING_COUNT { 16u };
42     /** Max push constant ranges */
43     static constexpr uint32_t MAX_PUSH_CONSTANT_RANGE_COUNT { 1u };
44     /** Max UBO bind byte size */
45     static constexpr uint32_t MAX_UBO_BIND_BYTE_SIZE { 16u * 1024u };
46     /** UBO bind offset alignemtn */
47     static constexpr uint32_t MIN_UBO_BIND_OFFSET_ALIGNMENT_BYTE_SIZE { 256u };
48 };
49 
50 /** Descriptor set layout binding */
51 struct DescriptorSetLayoutBinding {
52     /** Binding */
53     uint32_t binding { PipelineLayoutConstants::INVALID_INDEX };
54     /** Descriptor type */
55     DescriptorType descriptorType { DescriptorType::CORE_DESCRIPTOR_TYPE_MAX_ENUM };
56     /** Descriptor count */
57     uint32_t descriptorCount { 0 };
58     /** Stage flags */
59     ShaderStageFlags shaderStageFlags { 0 };
60 };
61 
62 /** Descriptor set layout bindings */
63 struct DescriptorSetLayoutBindings {
64     /** Bindings array */
65     BASE_NS::vector<DescriptorSetLayoutBinding> binding;
66 };
67 
68 /** Descriptor set layout binding resource */
69 struct DescriptorSetLayoutBindingResource {
70     /** Binding */
71     DescriptorSetLayoutBinding binding;
72     /** Resource index to typed data */
73     uint32_t resourceIndex { PipelineLayoutConstants::INVALID_INDEX };
74 };
75 
76 /** Bindable buffer */
77 struct BindableBuffer {
78     /** Handle */
79     RenderHandle handle {};
80     /** Byte offset to buffer */
81     uint32_t byteOffset { 0u };
82     /** Byte size for buffer binding */
83     uint32_t byteSize { PipelineStateConstants::GPU_BUFFER_WHOLE_SIZE };
84 };
85 
86 /** Bindable image */
87 struct BindableImage {
88     /** Handle */
89     RenderHandle handle {};
90     /** Mip level for specific binding */
91     uint32_t mip { PipelineStateConstants::GPU_IMAGE_ALL_MIP_LEVELS };
92     /** Layer level for specific binding */
93     uint32_t layer { PipelineStateConstants::GPU_IMAGE_ALL_LAYERS };
94     /** Custom image layout */
95     ImageLayout imageLayout { ImageLayout::CORE_IMAGE_LAYOUT_UNDEFINED };
96     /** Sampler handle for combined image sampler */
97     RenderHandle samplerHandle {};
98 };
99 
100 /** Bindable sampler */
101 struct BindableSampler {
102     /** Handle */
103     RenderHandle handle {};
104 };
105 
106 /** Bindable buffer with render handle reference */
107 struct BindableBufferWithHandleReference {
108     /** Handle */
109     RenderHandleReference handle;
110     /** Byte offset to buffer */
111     uint32_t byteOffset { 0u };
112     /** Byte size for buffer binding */
113     uint32_t byteSize { PipelineStateConstants::GPU_BUFFER_WHOLE_SIZE };
114 };
115 
116 /** Bindable image with render handle reference */
117 struct BindableImageWithHandleReference {
118     /** Handle */
119     RenderHandleReference handle;
120     /** Mip level for specific binding */
121     uint32_t mip { PipelineStateConstants::GPU_IMAGE_ALL_MIP_LEVELS };
122     /** Layer level for specific binding */
123     uint32_t layer { PipelineStateConstants::GPU_IMAGE_ALL_LAYERS };
124     /** Custom image layout */
125     ImageLayout imageLayout { ImageLayout::CORE_IMAGE_LAYOUT_UNDEFINED };
126     /** Sampler handle for combined image sampler */
127     RenderHandleReference samplerHandle;
128 };
129 
130 /** Bindable with sampler handle reference */
131 struct BindableSamplerWithHandleReference {
132     /** Handle */
133     RenderHandleReference handle;
134 };
135 
136 /** Descriptor structure for buffer */
137 struct BufferDescriptor {
138     /** Descriptor set layout binding */
139     DescriptorSetLayoutBinding binding {};
140     /** Bindable resource structure with handle */
141     BindableBuffer resource {};
142     /** Resource state in the pipeline */
143     GpuResourceState state {};
144 
145     /** Array offset to resources for array descriptors */
146     uint32_t arrayOffset { 0 };
147 
148     /** Additional flags */
149     AdditionalDescriptorFlags additionalFlags { 0u };
150 };
151 
152 /** Descriptor structure for image */
153 struct ImageDescriptor {
154     /** Descriptor set layout binding */
155     DescriptorSetLayoutBinding binding {};
156     /** Bindable resource structure with handle */
157     BindableImage resource {};
158     /** Resource state in the pipeline */
159     GpuResourceState state {};
160 
161     /** Array offset to resources for array descriptors */
162     uint32_t arrayOffset { 0 };
163 
164     /** Additional flags */
165     AdditionalDescriptorFlags additionalFlags { 0u };
166 };
167 
168 /** Descriptor structure for sampler */
169 struct SamplerDescriptor {
170     /** Descriptor set layout binding */
171     DescriptorSetLayoutBinding binding {};
172     /** Bindable resource structure with handle */
173     BindableSampler resource {};
174 
175     /** Array offset to resources for array descriptors */
176     uint32_t arrayOffset { 0 };
177 
178     /** Additional flags */
179     AdditionalDescriptorFlags additionalFlags { 0u };
180 };
181 
182 /** Descriptor set layout binding resources */
183 struct DescriptorSetLayoutBindingResources {
184     /** Bindings */
185     BASE_NS::array_view<const DescriptorSetLayoutBindingResource> bindings;
186 
187     /** Buffer descriptors */
188     BASE_NS::array_view<const BufferDescriptor> buffers;
189     /** Image descriptors */
190     BASE_NS::array_view<const ImageDescriptor> images;
191     /** Sampler descriptors */
192     BASE_NS::array_view<const SamplerDescriptor> samplers;
193 
194     /** Mask of bindings in the descriptor set. Max uint is value which means that not set */
195     uint32_t descriptorSetBindingMask { ~0u };
196     /** Current binding mask. Max uint is value which means that not set */
197     uint32_t bindingMask { ~0u };
198 };
199 
200 /** Descriptor set layout */
201 struct DescriptorSetLayout {
202     /** Set */
203     uint32_t set { PipelineLayoutConstants::INVALID_INDEX };
204     /** Bindings */
205     BASE_NS::vector<DescriptorSetLayoutBinding> bindings;
206 };
207 
208 /** Push constant */
209 struct PushConstant {
210     /** Shader stage flags */
211     ShaderStageFlags shaderStageFlags { 0 };
212     /** Byte size */
213     uint32_t byteSize { 0 };
214 };
215 
216 /** Pipeline layout */
217 struct PipelineLayout {
218     /** Push constant */
219     PushConstant pushConstant;
220     /** Descriptor set count */
221     uint32_t descriptorSetCount { 0 };
222     /** Descriptor sets */
223     DescriptorSetLayout descriptorSetLayouts[PipelineLayoutConstants::MAX_DESCRIPTOR_SET_COUNT] {};
224 };
225 
226 /** Shader thread group variables (can be used with group count and group sizes */
227 struct ShaderThreadGroup {
228     /** Thread group variable X */
229     uint32_t x { 1u };
230     /** Thread group variable Y */
231     uint32_t y { 1u };
232     /** Thread group variable Z */
233     uint32_t z { 1u };
234 };
235 /** @} */
236 RENDER_END_NAMESPACE()
237 
238 #endif // API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H
239